A Bit-Vector Algebra for Binary Moment Diagrams
نویسنده
چکیده
Multiplicative Binary Moment Diagram (*BMD) is a new representation that inherits from BDD. *BMDs map Boolean variables to integer values and so they are well-suited to handle a hierarchical veri-cation methodology. In this paper we experiment this representation to verify sequential arithmetic circuits. We extend *BMDs and provide an algebra that includes main operators commonly used at the bit-vector level. We illustrate the paper with the proof of a sequential multiplication instruction.
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